mha_varlen_fwd.cpp 16 KB

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  1. /******************************************************************************
  2. * Copyright (c) 2024, Tri Dao.
  3. ******************************************************************************/
  4. #include "flash_common.hpp"
  5. #include "fmha_fwd.hpp"
  6. #include "mask.hpp"
  7. fmha_fwd_traits get_ck_fmha_varlen_fwd_traits(const mask_info &mask,
  8. std::string dtype,
  9. int head_size,
  10. bool has_dropout,
  11. bool has_lse,
  12. bool enable_alibi)
  13. {
  14. return fmha_fwd_traits{head_size,
  15. head_size,
  16. dtype,
  17. true, // is_group_mode
  18. true, // is_v_rowmajor
  19. mask.type,
  20. enable_alibi ? bias_enum::alibi : bias_enum::no_bias,
  21. has_lse,
  22. has_dropout,
  23. false}; // do_fp8_static_quant
  24. }
  25. fmha_fwd_args get_ck_fmha_varlen_fwd_args(bool has_lse,
  26. bool has_dropout_randval,
  27. const mask_info &mask,
  28. // sizes
  29. const int b,
  30. const int max_seqlen_q,
  31. const int h,
  32. const int h_k,
  33. const int d,
  34. // device pointers
  35. const at::Tensor q,
  36. const at::Tensor k,
  37. const at::Tensor v,
  38. const at::Tensor seqlens_q,
  39. const at::Tensor seqlens_k,
  40. c10::optional<at::Tensor> &alibi_slopes_,
  41. at::Tensor out,
  42. at::Tensor softmax_lse,
  43. at::Tensor dropout_randval,
  44. float softmax_scale,
  45. float p_dropout,
  46. uint64_t drop_seed,
  47. uint64_t drop_offset)
  48. {
  49. // q: (total_q, nheads, d)
  50. // k: (total_k, nheads_k, d)
  51. // v: (total_k, nheads_k, d)
  52. // o: (total_q, nheads, d)
  53. // alibi_slopes:(batch, nheads) or (nhead)
  54. // lse: (nheads, total_q)
  55. // randval: (nheads, total_q, max_seqlen_k)
  56. ck_tile::index_t total_q = q.size(0);
  57. ck_tile::index_t total_k = k.size(0);
  58. ck_tile::index_t stride_q = q.stride(0);
  59. ck_tile::index_t stride_k = k.stride(0);
  60. ck_tile::index_t stride_v = v.stride(0);
  61. ck_tile::index_t stride_o = out.stride(0);
  62. ck_tile::index_t stride_randval = has_dropout_randval ? dropout_randval.stride(1) : 0;
  63. ck_tile::index_t nhead_stride_q = q.stride(1);
  64. ck_tile::index_t nhead_stride_k = k.stride(1);
  65. ck_tile::index_t nhead_stride_v = v.stride(1);
  66. ck_tile::index_t nhead_stride_o = out.stride(1);
  67. ck_tile::index_t nhead_stride_lse = has_lse ? softmax_lse.stride(0) : 0;
  68. ck_tile::index_t nhead_stride_randval = has_dropout_randval ? dropout_randval.stride(0) : 0;
  69. ck_tile::index_t batch_stride_q = 0;
  70. ck_tile::index_t batch_stride_k = 0;
  71. ck_tile::index_t batch_stride_v = 0;
  72. ck_tile::index_t batch_stride_o = 0;
  73. ck_tile::index_t batch_stride_lse = 0;
  74. ck_tile::index_t batch_stride_randval = 0;
  75. void *alibi_slopes_ptr = nullptr;
  76. ck_tile::index_t stride_alibi_slopes = 0;
  77. if (alibi_slopes_.has_value()) {
  78. auto alibi_slopes = alibi_slopes_.value();
  79. CHECK_DEVICE(alibi_slopes);
  80. TORCH_CHECK(alibi_slopes.stride(-1) == 1, "ALiBi slopes tensor must have contiguous last dimension");
  81. TORCH_CHECK(alibi_slopes.sizes() == torch::IntArrayRef({h}) || alibi_slopes.sizes() == torch::IntArrayRef({b, h}));
  82. alibi_slopes_ptr = alibi_slopes.data_ptr();
  83. stride_alibi_slopes = alibi_slopes.dim() == 2 ? alibi_slopes.stride(0) : 0;
  84. }
  85. return fmha_fwd_args{q.data_ptr(),
  86. k.data_ptr(),
  87. v.data_ptr(),
  88. alibi_slopes_ptr, // bias
  89. has_dropout_randval ? dropout_randval.data_ptr() : nullptr,
  90. has_lse ? softmax_lse.data_ptr() : nullptr,
  91. out.data_ptr(),
  92. seqlens_q.data_ptr(), // seqstart_q
  93. seqlens_k.data_ptr(), // seqstart_k
  94. nullptr, // seqlen_kpads
  95. total_q,
  96. total_k,
  97. b,
  98. max_seqlen_q,
  99. d, // hdim_q
  100. d, // hdim_v
  101. h, // nhead
  102. h_k, // nhead_k
  103. softmax_scale, // scale_s
  104. 1, // scale_p
  105. 1, // scale_o
  106. stride_q,
  107. stride_k,
  108. stride_v,
  109. stride_alibi_slopes,
  110. stride_randval,
  111. stride_o,
  112. nhead_stride_q,
  113. nhead_stride_k,
  114. nhead_stride_v,
  115. 0, // nhead_stride_bias, FA without bias
  116. nhead_stride_randval,
  117. nhead_stride_lse,
  118. nhead_stride_o,
  119. batch_stride_q,
  120. batch_stride_k,
  121. batch_stride_v,
  122. 0, // batch_stride_bias, FA without bias
  123. batch_stride_randval,
  124. batch_stride_lse,
  125. batch_stride_o,
  126. mask.left,
  127. mask.right,
  128. static_cast<ck_tile::index_t>(mask.type),
  129. p_dropout,
  130. has_dropout_randval,
  131. {drop_seed, drop_offset}};
  132. }
  133. std::vector<at::Tensor>
  134. mha_varlen_fwd(at::Tensor &q, // total_q x num_heads x head_size, total_q := \sum_{i=0}^{b} s_i
  135. const at::Tensor &k, // total_k x num_heads_k x head_size, total_k := \sum_{i=0}^{b} s_i or num_blocks x page_block_size x num_heads_k x head_size if there's a block_table.
  136. const at::Tensor &v, // total_k x num_heads_k x head_size, total_k := \sum_{i=0}^{b} s_i or num_blocks x page_block_size x num_heads_k x head_size if there's a block_table.
  137. c10::optional<at::Tensor> &out_, // total_q x num_heads x head_size, total_k := \sum_{i=0}^{b} s_i
  138. const at::Tensor &cu_seqlens_q, // b+1
  139. const at::Tensor &cu_seqlens_k, // b+1
  140. c10::optional<at::Tensor> & /*seqused_k*/,
  141. c10::optional<const at::Tensor> &/*leftpad_k_*/, // batch_size
  142. c10::optional<at::Tensor> &block_table_, // batch_size x max_num_blocks_per_seq
  143. c10::optional<at::Tensor> &alibi_slopes_, // num_heads or b x num_heads
  144. int max_seqlen_q,
  145. const int max_seqlen_k,
  146. const float p_dropout,
  147. const float softmax_scale,
  148. const bool zero_tensors,
  149. bool is_causal,
  150. int window_size_left,
  151. int window_size_right,
  152. const float /*softcap*/,
  153. const bool return_dropout_randval,
  154. c10::optional<at::Generator> gen_)
  155. {
  156. auto q_dtype = q.dtype();
  157. TORCH_CHECK(q_dtype == torch::kFloat16 || q_dtype == torch::kBFloat16,
  158. "FlashAttention only support fp16 and bf16 data type");
  159. TORCH_CHECK(k.dtype() == q_dtype, "query and key must have the same dtype");
  160. TORCH_CHECK(v.dtype() == q_dtype, "query and value must have the same dtype");
  161. TORCH_CHECK(cu_seqlens_q.dtype() == torch::kInt32, "cu_seqlens_q must have dtype int32");
  162. TORCH_CHECK(cu_seqlens_k.dtype() == torch::kInt32, "cu_seqlens_k must have dtype int32");
  163. std::string q_dtype_str = q_dtype == torch::kFloat16 ? "fp16" : "bf16";
  164. CHECK_DEVICE(q); CHECK_DEVICE(k); CHECK_DEVICE(v);
  165. CHECK_DEVICE(cu_seqlens_q);
  166. CHECK_DEVICE(cu_seqlens_k);
  167. // TODO - Support paged_KV
  168. const bool paged_KV = block_table_.has_value();
  169. TORCH_CHECK(!paged_KV, "CK does not support paged_KV yet");
  170. TORCH_CHECK(q.stride(-1) == 1, "Input tensor must have contiguous last dimension");
  171. TORCH_CHECK(k.stride(-1) == 1, "Input tensor must have contiguous last dimension");
  172. TORCH_CHECK(v.stride(-1) == 1, "Input tensor must have contiguous last dimension");
  173. CHECK_CONTIGUOUS(cu_seqlens_q);
  174. CHECK_CONTIGUOUS(cu_seqlens_k);
  175. const auto sizes = q.sizes();
  176. const int batch_size = cu_seqlens_q.numel() - 1;
  177. int num_heads = sizes[1];
  178. const int head_size_og = sizes[2];
  179. const int num_heads_k = k.size(1);
  180. const int max_num_blocks_per_seq = 0;
  181. const int num_blocks = 0;
  182. if (max_seqlen_q == 1 && !alibi_slopes_.has_value()) { is_causal = false; } // causal=true is the same as causal=false in this case
  183. // TODO
  184. // Faster to transpose q from (b, 1, (nheads_kv ngroups), d) to (b, ngroups, nheads_kv, d) in this case
  185. // H/t Daniel Haziza
  186. const int total_q = q.size(0);
  187. const int total_k = k.size(0);
  188. TORCH_CHECK(batch_size > 0, "batch size must be postive");
  189. TORCH_CHECK(head_size_og <= 256, "CK only supports head dimension at most 256");
  190. TORCH_CHECK(num_heads % num_heads_k == 0, "Number of heads in key/value must divide number of heads in query");
  191. if (window_size_left >= max_seqlen_k) { window_size_left = -1; }
  192. if (window_size_right >= max_seqlen_k) { window_size_right = -1; }
  193. mask_info mask;
  194. if (is_causal) {
  195. // Causal is the special case where window_size_right == 0 and window_size_left < 0.
  196. window_size_right = 0;
  197. std::string mask_identify = "b:" + std::to_string(window_size_left) + "," + "0";
  198. mask = mask_info::decode(mask_identify, max_seqlen_q, max_seqlen_k); // casual
  199. }
  200. else if (window_size_left == -1 && window_size_right == -1) {
  201. mask = mask_info::decode("0", max_seqlen_q, max_seqlen_k); // no mask
  202. }
  203. else {
  204. // Local is the more general case where window_size_right >= 0 or window_size_left >= 0.
  205. std::string mask_identify = "b:" + std::to_string(window_size_left) + "," + std::to_string(window_size_right);
  206. mask = mask_info::decode(mask_identify, max_seqlen_q, max_seqlen_k); // local
  207. }
  208. CHECK_SHAPE(q, total_q, num_heads, head_size_og);
  209. CHECK_SHAPE(k, total_k, num_heads_k, head_size_og);
  210. CHECK_SHAPE(v, total_k, num_heads_k, head_size_og);
  211. CHECK_SHAPE(cu_seqlens_q, batch_size + 1);
  212. CHECK_SHAPE(cu_seqlens_k, batch_size + 1);
  213. at::Tensor q_padded, k_padded, v_padded;
  214. if (head_size_og % 8 != 0) {
  215. q_padded = torch::nn::functional::pad(q, torch::nn::functional::PadFuncOptions({0, 8 - head_size_og % 8}));
  216. k_padded = torch::nn::functional::pad(k, torch::nn::functional::PadFuncOptions({0, 8 - head_size_og % 8}));
  217. v_padded = torch::nn::functional::pad(v, torch::nn::functional::PadFuncOptions({0, 8 - head_size_og % 8}));
  218. }
  219. else {
  220. q_padded = q;
  221. k_padded = k;
  222. v_padded = v;
  223. }
  224. at::Tensor out;
  225. if (out_.has_value()) {
  226. out = out_.value();
  227. TORCH_CHECK(out.dtype() == q_dtype, "Output must have the same dtype as inputs");
  228. CHECK_DEVICE(out);
  229. TORCH_CHECK(out.stride(-1) == 1, "Output tensor must have contiguous last dimension");
  230. CHECK_SHAPE(out, total_q, num_heads, head_size_og);
  231. if (head_size_og % 8 != 0) { out = torch::empty_like(q_padded); }
  232. }
  233. else {
  234. out = torch::empty_like(q_padded);
  235. }
  236. auto round_multiple = [](int x, int m) { return (x + m - 1) / m * m; };
  237. const int head_size_8x = round_multiple(head_size_og, 8);
  238. // Otherwise the kernel will be launched from cuda:0 device
  239. // Cast to char to avoid compiler warning about narrowing
  240. at::cuda::CUDAGuard device_guard{(char)q.get_device()};
  241. auto opts = q.options();
  242. bool has_lse = true;
  243. bool has_dropout = p_dropout > 0.0f;
  244. at::Tensor softmax_lse;
  245. // TODO - check gradient, only training require lse
  246. softmax_lse = torch::empty({num_heads, total_q}, opts.dtype(torch::kFloat32));
  247. at::Tensor p;
  248. if (return_dropout_randval) {
  249. TORCH_CHECK(has_dropout, "return_dropout_randval require p_dropout > 0");
  250. p = torch::empty({num_heads, total_q, max_seqlen_k}, opts.dtype(torch::kUInt8));
  251. }
  252. if (zero_tensors)
  253. {
  254. out.zero_();
  255. softmax_lse.fill_(-std::numeric_limits<float>::infinity());
  256. if (return_dropout_randval) {p.zero_();}
  257. }
  258. uint64_t drop_seed = 1, drop_offset = 0;
  259. int64_t counter_offset = batch_size * num_heads * ck_tile::get_warp_size();
  260. auto options = torch::TensorOptions().dtype(torch::kFloat32).device(torch::kCUDA);
  261. auto rng_state = torch::empty({2}, options.dtype(torch::kInt64));
  262. if (p_dropout > 0.0) {
  263. auto gen = at::get_generator_or_default<at::CUDAGeneratorImpl>(
  264. gen_, at::cuda::detail::getDefaultCUDAGenerator());
  265. // See Note [Acquire lock when using random generators]
  266. std::lock_guard<std::mutex> lock(gen->mutex_);
  267. auto philox_args = gen->philox_cuda_state(counter_offset);
  268. std::tie(drop_seed, drop_offset) = flash::unpack(philox_args);
  269. }
  270. rng_state[0] = *(reinterpret_cast<int64_t*>(&drop_seed));
  271. rng_state[1] = *(reinterpret_cast<int64_t*>(&drop_offset));
  272. if (max_seqlen_k > 0) {
  273. auto stream = at::cuda::getCurrentHIPStream().stream();
  274. ck_tile::stream_config stream_config{stream};
  275. auto traits =
  276. get_ck_fmha_varlen_fwd_traits(
  277. mask,
  278. q_dtype_str,
  279. head_size_8x,
  280. has_dropout,
  281. has_lse,
  282. alibi_slopes_.has_value());
  283. auto args =
  284. get_ck_fmha_varlen_fwd_args(
  285. has_lse,
  286. return_dropout_randval,
  287. mask,
  288. batch_size,
  289. max_seqlen_q,
  290. num_heads,
  291. num_heads_k,
  292. head_size_8x,
  293. q_padded,
  294. k_padded,
  295. v_padded,
  296. cu_seqlens_q,
  297. cu_seqlens_k,
  298. alibi_slopes_,
  299. out,
  300. softmax_lse,
  301. p,
  302. softmax_scale,
  303. p_dropout,
  304. drop_seed,
  305. drop_offset);
  306. float t = fmha_fwd(traits, args, stream_config);
  307. TORCH_CHECK(t >= 0, "invalid argument for fmha_fwd");
  308. }
  309. else {
  310. // If seqlen_k == 0, then we have an empty tensor. We need to set the output to 0.
  311. out.zero_();
  312. softmax_lse.fill_(std::numeric_limits<float>::infinity());
  313. }
  314. at::Tensor out_padded = out;
  315. if (head_size_og % 8 != 0) {
  316. out = out.index({"...", torch::indexing::Slice(torch::indexing::None, head_size_og)});
  317. if (out_.has_value()) { out_.value().copy_(out); }
  318. }
  319. return {out, q_padded, k_padded, v_padded, out_padded, softmax_lse, p, rng_state};
  320. }